1. Field of the Invention
The present invention relates to a two-bit flash memory technology. More particularly, the present invention relates to a two-bit flash memory capable of increasing controllability of a control gate.
2. Description of Related Art
In various kinds of non-volatile memories, an electrically erasable programmable read-only memory (EEPROM), capable of saving programmed information without being limited by the ON/OFF of the power supply, has been widely used by personal computers and electronic devices. A non-volatile memory called “flash memory” has become one of the important memory elements on the market, due to the mature technology and low cost.
Generally, the flash memory is formed by sequentially stacking a tunneling oxide layer, a floating gate, a dielectric layer, and a control gate on a substrate. However, as the element becomes increasingly small, the current flash memory cell is also continuously improved. Recently, a “two-bit flash memory” has been developed, which is approximately shown in FIG. 1. A control gate 102 is fabricated like a fish fin perpendicularly standing on a flat substrate 100, and floating gates 104 are disposed on two sides of the fish-fin-shaped control gate 102. dielectric layers 106 are sandwiched by the control gate 102 and the floating gates 104. A source 108a and a drain 108b are disposed in the substrate 100 on two sides of the floating gates 104, and a channel region 110 is formed there-between. In addition, a tunneling oxide layer 112 is sandwiched by the floating gates 104 and the substrate 100.
However, currently, in order to cater to the development of semiconductor manufacturing process for the 60 nm generation, the channel length of the two-bit flash memory must be shortened. Due to the short channel effect (SCE), the controllability of the control gate is greatly reduced, and as a result, the memory cell window is insufficient.